The present invention relates to a data storage technique and, more specifically, to a technique which is effective if applied to a variable-length data memory system; for example, a technique which is effective when used with a storage system for storing the transmitted or received data of serial communications in a buffer memory by a DMA (i.e., Direct Memory Access) controller for block transfer control.
In serial communications between microcomputers, the transmission and reception of data is performed in a unit referred to as a "frame". Therefore, it is convenient to store the transmitted or received data with the individual frames being linked, even in the case where they are to be stored in the same buffer memory. However, it is frequently difficult to retain a series of available memory regions in the buffer memory to store a large amount of transmitted or received data or long-bit frames while also providing a high utilization efficiency of the memory space.
Therefore, a storage system will be examined in which a number of relatively small buffer regions are provided in a buffer memory and are sequentially linked for storage of data by use of descripters functioning as pointers, as shown in FIG. 2.
Specifically, two kinds of descripters referred to as "data descripters DTD" and "buffer descripters BFD" are linked to each other, and each buffer descripter BFD is associated with a buffer region BA having a constant size. Moreover, each of the aforementioned data descripters DTD and buffer descripters BFD is formed with two pointer portions, such that the head address BTA of the first buffer descripter BFD is introduced into the first pointer part of the data descripter DTD, whereas the head address DTA of the next data descripter DTD following the first-mentioned data descripter is introduced into the second pointer part. The head address BNA of the next buffer descripter BFD is introduced into the first pointer part of the aforementioned buffer descripter BFD, whereas the head address TA of a unit buffer region BA for storing the received data is introduced into the second pointer part. As a result, the received data of one frame is stored in an n-number (wherein n denotes an arbitrary integer) of buffer regions BA provided for the respective data descripters DTD. Incidentally, the aforementioned data descripters DTD and buffer descripters BFD are also stored in the buffer memory.
Some frames of the data to be transmitted or received in the aforementioned serial communications have a variable length, such as several bytes or several kilobytes. In the storage system shown in FIG. 2, however, the number of buffer regions BA to be linked under one data descripter DTD is fixed. Therefore, if the number of the buffer regions BA is fixed in conformity with the longest frame, an increased number of ineffective buffer regions (i.e., the portions other than those hatched in FIG. 2) are left unused in the case of short data having a frame of several bytes, so that the utilization efficiency of the memory is low. When the data consisting of serial frames is to be read out from buffer memory, on the other hand, the head address of the next data can not be determined unless both the data descripter and the buffer descripter are read. This raises the problem that it takes a long time to access the next data (or frame).